b70-optimization-lab

vLLM / Intel XPU Upstream Candidates

Date: 2026-06-17

This file collects work from this repo that looks generally useful for vLLM, vllm-xpu-kernels, Intel XPU/oneCCL/oneAPI, or related integration docs. It intentionally excludes one-off benchmark wiring and speed hacks that did not survive quality gates.

This is not a claim that each item is already upstream-ready. The goal is to identify reusable patches, diagnostics, and design directions that could be turned into clean PRs or maintainer-actionable issues.

LocalMaxxing result submission credentials and helper usage are documented in localmaxxing.md; keep the API key outside Git.

Hardware coverage caveat: the local Intel lab has four B70 32 GB cards. That is enough to find real vLLM/XPU bugs and validate quality-gated patches, but it is not enough to keep broad larger-model coverage moving in parallel. Higher-VRAM Intel devices, especially Crescent Island-class 160-480 GB evaluation hardware or comparable future XPU parts, would make the upstream-candidate list less theoretical for GLM 5.2, DeepSeek Flash-class, and larger MoE/context profiles.

Highest-Value Candidates

1. XPU W8A8 INT8 grouped GEMM and MoE support

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2. MoE route capture for real-distribution kernel tuning

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3. AOT/custom-op census for vLLM generated graphs

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4. Graph-cache provenance guard and quality sentinels

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5. XPU decode graph replay correctness regression

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6. XPU CPU KV offload and session-cache support

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7. TurboQuant XPU workspace handling

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8. Modular low-memory builds for vllm-xpu-kernels

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9. Compressed-tensors scalar-scale handling for XPU FA2

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10. XPU block-FP8 fallback and requantization experiments

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11. Graph-safe communication and oneCCL diagnostics

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12. XPU GDN / Mamba state tracing for speculative decoding

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13. Runtime/device-lost diagnostics around XPU metadata copies

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Good Operational / Documentation Candidates

These are not mostly code patches, but they would materially improve the vLLM/Intel user path.

  1. Publish a B70 vLLM compatibility matrix: PyTorch XPU, oneAPI compiler, Intel compute runtime, oneCCL, vLLM, vllm-xpu-kernels, and known-good model recipes.
  2. Publish ABI-matched vllm-xpu-kernels wheels for supported PyTorch XPU releases.
  3. Provide an intel-ai doctor or vllm xpu doctor command that checks GPU visibility, Level Zero, PyTorch XPU, oneCCL, native extension ABI, cache permissions, compiler version, topology, and expected RAM/swap.
  4. Make oneAPI compiler selection explicit. Avoid global setvars.sh drift when a narrower compiler env such as compiler/2025.3/env/vars.sh is required.
  5. Register extension-owned VLLM_* environment variables so useful XPU flags do not appear as unknown mistakes in logs.

Relevant docs:

Do Not Upstream Yet

These were useful lab experiments but should not be presented as general upstream wins without more work.

Suggested PR / Issue Split

  1. Small PR: compressed-tensors singleton scale fix for XPU FA2.
  2. Small PR: vllm-xpu-kernels modular build targets or documented _C-only build mode.
  3. Diagnostic PR: MoE route capture, default-off.
  4. Diagnostic PR: AOT/custom-op census tool.
  5. Correctness issue: XPU decode graph replay corruption with fixed-repeat reproducer.
  6. Feature issue: official XPU CPU KV offload semantics and implementation.
  7. Feature issue: TurboQuant XPU workspace pre-sizing.
  8. Kernel project: W8A8 INT8 grouped GEMM / MoE path for Qwen3.6-class routed decode.
  9. Kernel project: native block-FP8 W8A8 support for XPU.
  10. Reliability issue: structured Level Zero device-lost diagnostics for vLLM worker metadata/copy paths.